Von Neumann Architecture - OCR GCSE Lesson

This lesson is about the Von Neumann Architecture and has been specially created for the OCR GCSE Computer Science (J277) course, meaning there is no irrelevant content from other exam boards. This resource consists of a PowerPoint presentation, a worksheet with an answer sheet, custom exam-styled questions with a mark scheme, and a full lesson plan. See the video and the preview image to see what is included!

Feedback has been considered when creating and updating this resource to ensure it is appealing, engaging, and challenging. This resource will be updated to ensure it is (one of) the best!

Please note that the knowledge of passing of data between registers during the FDE cycle is not required, however, I have found students generally understand the content far better if an animation of this process is shown. You can choose whether to keep or remove this animation in the presentation.

Duration: 2-3 Lessons

This resource is designed to cover:

• Common CPU components and their function: ALU, CU, cache, registers.
• Von Neumann architecture.
• Fetch-Decode-Execute cycle involving registers.
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  I hope you like this resource, other complete lessons in unit 1.1:

1. Purpose of the CPU (Free)
2. Von Neumann Architecture (Current)
3. CPU Performance
4. Embedded Systems (Free)